Invention Grant
- Patent Title: Non-volatile memory and fabricating method thereof
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Application No.: US14639087Application Date: 2015-03-04
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Publication No.: US09780195B2Publication Date: 2017-10-03
- Inventor: Chien-Lung Chu , Chun-Hung Chen , Ta-Chien Chiu
- Applicant: Powerchip Technology Corporation
- Applicant Address: TW Hsinchu
- Assignee: Powerchip Tehnology Corporation
- Current Assignee: Powerchip Tehnology Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW103145465A 20141225
- Main IPC: H01L27/11
- IPC: H01L27/11 ; H01L29/66 ; H01L27/11565 ; H01L29/78 ; H01L27/1157 ; H01L27/11582

Abstract:
A non-volatile memory includes a substrate, a stacked structure, a channel layer, and a second dielectric layer. The stacked structure includes a first dielectric layer and a plurality of memory cells. The first dielectric layer is disposed on the substrate. The memory cells are stacked on the first dielectric layer. Each of the memory cells includes two first conductive layers and a charge storage structure. The charge storage structure is disposed between the two first conductive layers. The charge storage structures in the vertically adjacent memory cells are separated from each other. The channel layer is disposed on a sidewall of the stacked structure and connected to the substrate. The second dielectric layer is disposed between the channel layer and the first conductive layers.
Public/Granted literature
- US20160190150A1 NON-VOLATILE MEMORY AND FABRICATING METHOD THEREOF Public/Granted day:2016-06-30
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