- Patent Title: Method, system, and computer program product for schematic driven, unified thermal and electromagnetic interference compliance analyses for electronic circuit designs
-
Application No.: US14476365Application Date: 2014-09-03
-
Publication No.: US09785141B2Publication Date: 2017-10-10
- Inventor: Alok Tripathi , An-yu Kuo , Bradley Brim , Taranjit Singh Kukal
- Applicant: Cadence Design Systems, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G05B19/418

Abstract:
Disclosed are methods and systems for by identifying or generating an electrical schematic, generating a thermal schematic by associating thermal RC circuits of the electronic design with the electrical schematic, performing at least two analyses of an electrical analysis, a thermal analysis, and an electromagnetic interference compliance (EMC) analysis with the electrical schematic and the thermal schematic of the electronic design. The electrical, thermal, and EMC analyses may be performed concurrently by forwarding intermediate or final analysis results to each other, and the analysis results may be presented simultaneously in one or more user interface windows. The thermal schematic may be obtained by extracting the thermal RC circuits, identifying corresponding electrical circuit components that correspond to the extracted thermal RC circuits, and importing the thermal RC circuits into the electrical schematic so that the electrical and thermal schematics have the same nodes.
Public/Granted literature
Information query