Invention Grant
- Patent Title: Methods of forming field effect transistors using a gate cut process following final gate formation
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Application No.: US15134713Application Date: 2016-04-21
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Publication No.: US09786507B2Publication Date: 2017-10-10
- Inventor: Brent A. Anderson , Edward J. Nowak
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Gibb & Riley, LLC
- Agent Steven J. Meyers
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L27/12 ; H01L21/84 ; H01L21/762 ; H01L21/8234 ; H01L29/66 ; H01L21/3105 ; H01L29/51 ; H01L27/088 ; H01L29/06 ; H01L21/265 ; H01L29/49 ; H01L21/8238 ; H01L23/528 ; H01L27/092 ; H01L29/08 ; H01L29/10

Abstract:
Disclosed are field effect transistor (FET) formation methods using a final gate cut process and the resulting structures. One method forms an elongated gate across first and second semiconductor bodies for first and second FETs, respectively. An opening is formed in a portion of the elongated gate between the semiconductor bodies, cutting at least the gate conductor layer. The opening is filled with an isolation layer, thereby forming an isolation region that segments the elongated gate into first and second gates for the first and second FETs, respectively. Another method forms at least three gates across an elongated semiconductor body. An isolation region is formed that extends, not only through a portion of a center one of the gates, but also through a corresponding portion of the elongated semiconductor body adjacent to that gate, thereby segmenting the elongated semiconductor body into discrete semiconductor bodies for first and second FETs.
Public/Granted literature
- US20160233094A1 METHODS OF FORMING FIELD EFFECT TRANSISTORS USING A GATE CUT PROCESS FOLLOWING FINAL GATE FORMATION Public/Granted day:2016-08-11
Information query
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