Invention Grant
- Patent Title: Isolation structure of semiconductor device
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Application No.: US14961573Application Date: 2015-12-07
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Publication No.: US09786543B2Publication Date: 2017-10-10
- Inventor: Shu-Han Chen , Cheng-Hsien Wu , Chih-Hsin Ko , Clement Hsingjen Wann
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/762 ; H01L29/78 ; H01L29/51 ; H01L29/66 ; H01L29/165

Abstract:
The invention relates to an isolation structure of a semiconductor device and a method of forming. An exemplary isolation structure for a semiconductor device comprises a substrate comprising a trench; a strained material in the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate; an oxide layer of the strained material over the strained material; a high-k dielectric layer over the oxide layer; and a dielectric layer over the high-k dielectric layer filling the trench.
Public/Granted literature
- US20160086840A1 Isolation Structure of Semiconductor Device Public/Granted day:2016-03-24
Information query
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