Invention Grant
- Patent Title: Chip-on-wafer process control monitoring for chip-on-wafer-on-substrate packages
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Application No.: US15414909Application Date: 2017-01-25
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Publication No.: US09786567B2Publication Date: 2017-10-10
- Inventor: Wei-Cheng Wu , Li-Han Hsu , Sao-Ling Chiu , Shang-Yun Hou , Shin-Puu Jeng , Chen-Hua Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: G01R31/26
- IPC: G01R31/26 ; H01L21/66 ; G01R31/28 ; G01R1/073 ; G01R31/265 ; H01L25/00 ; H01L23/00 ; H01L25/065
Abstract:
An embodiment method includes providing a standardized testing structure design for a chip-on-wafer (CoW) structure, wherein the standardized testing structure design comprises placing a testing structure in a pre-selected area a top die in the CoW structure, and electrically testing a plurality of microbumps in the CoW structure by applying a universal testing probe card to the testing structure.
Public/Granted literature
- US20170133282A1 Chip-on-Wafer Process Control Monitoring for Chip-on-Wafer-on-Substrate Packages Public/Granted day:2017-05-11
Information query
