Invention Grant
- Patent Title: Chip packages and methods of manufacture thereof
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Application No.: US14942267Application Date: 2015-11-16
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Publication No.: US09786617B2Publication Date: 2017-10-10
- Inventor: Zi-Jheng Liu , Chen-Cheng Kuo , Chung-Shi Liu , Hung-Jui Kuo , Yu-Hsiang Hu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/683 ; H01L21/56 ; H01L23/31

Abstract:
A chip package may include a die and a redistribution structure over the die. The redistribution structure may include a die, a redistribution structure over the die, and an under-bump metallurgy (UBM) structure over the redistribution structure. The UBM structure may include a central portion, a peripheral portion physically separated from and surrounding a perimeter of the central portion, and a bridging portion having a first end and a second end opposite the first end. The first end of the bridging portion may be coupled to the central portion of the UBM structure, while the second end of the bridging portion may be coupled to the peripheral portion of the UBM structure.
Public/Granted literature
- US20170141055A1 Chip Packages and Methods of Manufacture Thereof Public/Granted day:2017-05-18
Information query
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