Invention Grant
- Patent Title: Improving signaling performance in connector design
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Application No.: US13997893Application Date: 2012-03-31
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Publication No.: US09787028B2Publication Date: 2017-10-10
- Inventor: Raul Enriquez-Shibayama , Kai Xiao , Xiang Li
- Applicant: Raul Enriquez-Shibayama , Kai Xiao , Xiang Li
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Jordan IP Law, LLC
- International Application: PCT/US2012/031758 WO 20120331
- International Announcement: WO2013/147912 WO 20131003
- Main IPC: H01R13/6461
- IPC: H01R13/6461 ; H01R12/73 ; H01R13/6471
Abstract:
Apparatus and methods of arranging ground pins and signal pins in a card connector includes arranging a signal pins and ground pins in a card connector into at least six (6) columns divided between a primary side and a secondary side of the connector.
Public/Granted literature
- US20140162498A1 IMPROVING SIGNALING PERFORMANCE IN CONNECTOR DESIGN Public/Granted day:2014-06-12
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