Invention Grant
- Patent Title: Impedance calibration circuit
-
Application No.: US15409057Application Date: 2017-01-18
-
Publication No.: US09787287B2Publication Date: 2017-10-10
- Inventor: Seung Geun Baek , Jae Il Kim
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2015-0083635 20150612
- Main IPC: H03K17/16
- IPC: H03K17/16 ; H03K19/003 ; H03H11/28

Abstract:
An impedance calibration circuit is disclosed, which relates to a technology for improving precision of pad resistance. The impedance calibration circuit includes: a first On Die Termination (ODT) circuit selected by a first selection signal, configured to tune its own resistance using a first code signal, and output a first resistance value to an output terminal; and a second ODT circuit selected by a second selection signal, configured to tune its own resistance using a second code signal, and output a second resistance value to the output terminal.
Public/Granted literature
- US20170134006A1 IMPEDANCE CALIBRATION CIRCUIT Public/Granted day:2017-05-11
Information query