Invention Grant
- Patent Title: Optimized credit return mechanism for packet sends
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Application No.: US15285825Application Date: 2016-10-05
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Publication No.: US09792235B2Publication Date: 2017-10-17
- Inventor: Mark Debbage , Yatin M. Mutha
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Law Office of R. Alan Burnett, P.S.
- Main IPC: G06F13/36
- IPC: G06F13/36 ; G06F13/372 ; G06F13/42 ; G06F13/28 ; G06F5/06 ; G06F13/16 ; G06F13/362 ; G06F15/78

Abstract:
Method and apparatus for implementing an optimized credit return mechanism for packet sends. A Programmed Input/Output (PIO) send memory is partitioned into a plurality of send contexts, each comprising a memory buffer including a plurality of send blocks configured to store packet data. A storage scheme using FIFO semantics is implemented with each send block associated with a respective FIFO slot. In response to receiving packet data written to the send blocks and detecting the data in those send blocks has egressed from a send context, corresponding freed FIFO slots are detected, and a lowest slot for which credit return indicia has not be returned is determined. The highest slot in a sequence of freed slots from the lowest slot is then determined, and corresponding credit return indicia is returned. In one embodiment an absolute credit return count is implemented for each send context, with an associated absolute credit sent count tracked via software that writes to the PIO send memory, with the two absolute credit counts used for flow control.
Public/Granted literature
- US20170235693A1 OPTIMIZED CREDIT RETURN MECHANISM FOR PACKET SENDS Public/Granted day:2017-08-17
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