A system for zapping a wafer, the system may include a pulse generation unit that is configured to generate (a) first zapping pulses for causing a breakdown in a first location of a backside insulating layer of a wafer, and (b) second zapping pulses for causing a breakdown in a second location of the backside insulating layer of the wafer; a first conductive interface that is configured to convey the first zapping pulses to the first location, while contacting the first location; a second conductive interface that is configured to convey the second zapping pulses to the second location, while contacting the second location; and wherein the first location differs from the second location.