- Patent Title: Vertical structure having an etch stop over portion of the source
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Application No.: US15430614Application Date: 2017-02-13
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Publication No.: US09805968B2Publication Date: 2017-10-31
- Inventor: Cheng-Tung Lin , Teng-Chun Tsai , Li-Ting Wang , De-Fang Chen , Bing-Hung Chen , Huang-Yi Huang , Hui-Cheng Chang , Huan-Just Lin , Ming-Hsing Tsai
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/762 ; H01L29/66 ; H01L29/78 ; H01L21/8238 ; H01L21/3115 ; H01L21/311 ; H01L21/265

Abstract:
According to an exemplary embodiment, a method of forming a semiconductor device is provided. The method includes: providing a vertical structure over a substrate; forming an etch stop layer over the vertical structure; forming an oxide layer over the etch stop layer; performing chemical mechanical polishing on the oxide layer and stopping on the etch stop layer; etching back the oxide layer and the etch stop layer to expose a sidewall of the vertical structure and to form an isolation layer; oxidizing the sidewall of the vertical structure and doping oxygen into the isolation layer by using a cluster oxygen doping treatment.
Public/Granted literature
- US20170154807A1 Vertical Structure and Method of Forming Semiconductor Device Public/Granted day:2017-06-01
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