Invention Grant
- Patent Title: Transistor arrangement with semiconductor chips between two substrates
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Application No.: US14044232Application Date: 2013-10-02
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Publication No.: US09806029B2Publication Date: 2017-10-31
- Inventor: Ralf Otremba , Josef Hoeglauer , Chooi Mei Chong
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Main IPC: H05K1/00
- IPC: H05K1/00 ; H05K1/18 ; H05K7/00 ; H01L23/538 ; H01L21/02 ; H01L23/00 ; H01L23/433 ; H01L23/495 ; H01L23/31
Abstract:
An electronic device comprising a first substrate, a second substrate, a first semiconductor chip comprising a transistor, comprising a first mounting surface bonded to the first substrate and comprising a second mounting surface bonded to the second substrate, and a second semiconductor chip comprising a first mounting surface bonded to the first substrate and comprising a second mounting surface bonded to the second substrate, wherein the first semiconductor chip comprises a via electrically coupling a first transistor terminal at its first mounting surface with a second transistor terminal at its second mounting surface.
Public/Granted literature
- US20150092375A1 Transistor arrangement with semiconductor chips between two substrates Public/Granted day:2015-04-02
Information query
