Invention Grant
- Patent Title: Stress control on thin silicon substrates
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Application No.: US14953792Application Date: 2015-11-30
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Publication No.: US09806183B2Publication Date: 2017-10-31
- Inventor: Jie Su , George Papasouliotis
- Applicant: Veeco Instruments, Inc.
- Applicant Address: US NY Plainview
- Assignee: Veeco Instruments, Inc.
- Current Assignee: Veeco Instruments, Inc.
- Current Assignee Address: US NY Plainview
- Agency: Holzer Patel Drennan
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L29/778 ; H01L29/66 ; H01L29/20 ; H01L29/205 ; H01L21/02

Abstract:
Methods for stress control in thin silicon (Si) wafer-based semiconductor materials. By a specific interrelation of process parameters (e.g., temperature, reactant supply, time), a highly uniform nucleation layer is formed on the Si substrate that mitigates and/or better controls the stress (tensile and compressive) in subsequent layers formed on the thin Si substrate.
Public/Granted literature
- US20170154986A1 STRESS CONTROL ON THIN SILICON SUBSTRATES Public/Granted day:2017-06-01
Information query
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