- Patent Title: Power off period estimating method for solid state storage device
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Application No.: US15191701Application Date: 2016-06-24
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Publication No.: US09812210B2Publication Date: 2017-11-07
- Inventor: Shih-Jia Zeng , Jen-Chien Fu
- Applicant: Lite-On Electronics (Guangzhou) Limited , LITE-ON TECHNOLOGY CORPORATION
- Applicant Address: CN Guangzhou TW Taipei
- Assignee: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED,LITE-ON TECHNOLOGY CORPORATION
- Current Assignee: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED,LITE-ON TECHNOLOGY CORPORATION
- Current Assignee Address: CN Guangzhou TW Taipei
- Agency: WPAT, PC
- Priority: CN201610151191 20160316
- Main IPC: G11C16/26
- IPC: G11C16/26 ; G11C16/30 ; G11C16/16 ; G06F11/07

Abstract:
A power-off period estimating method for a solid state storage device is provided. A memory array of a non-volatile memory of the solid state storage device includes plural blocks. Firstly, a first quality parameter of a first block of the plural blocks is calculated before the solid state storage device is powered off. When the first block is corrected at a first time counting value, a first read voltage set of the first block is acquired and the first time counting value is recorded. Then, the first block is corrected after the solid state storage device is powered on, so that a second read voltage set of the first block is acquired. Then, a power-off period is calculated according to the first quality parameter, the first read voltage set, the second read voltage set and the first time counting value.
Public/Granted literature
- US20170271020A1 POWER-OFF PERIOD ESTIMATING METHOD FOR SOLID STATE STORAGE DEVICE Public/Granted day:2017-09-21
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