Invention Grant
- Patent Title: Semiconductor memory device having memory cells provided in a height direction
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Application No.: US14849061Application Date: 2015-09-09
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Publication No.: US09812398B2Publication Date: 2017-11-07
- Inventor: Ming Hu , Toshiyuki Takewaki , Seiichi Omoto
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L31/036 ; H01L31/112 ; H01L23/532 ; H01L27/11582 ; H01L27/1157

Abstract:
According to an embodiment, a semiconductor memory device comprises: a memory string comprising a plurality of memory cells connected in series therein; and a contact electrically connected to one end of the memory string. The memory string comprises a plurality of control gate electrodes, and a semiconductor layer. The contact comprises a contact layer, the contact layer having a plate-like shape whose longer direction is a first direction parallel to the substrate, and the contact layer having its lower surface electrically connected to the one end of the semiconductor layer. Moreover, the contact layer includes a metal layer, a silicon based layer, and a second conductive layer. The metal layer includes tungsten. The silicon based layer includes a material including silicon. The second conductive layer covers side surfaces of the metal layer and the silicon based layer.
Public/Granted literature
- US20160268191A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2016-09-15
Information query
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