Invention Grant
- Patent Title: Interconnect structures for assembly of multi-layer semiconductor devices
-
Application No.: US15312063Application Date: 2015-11-05
-
Publication No.: US09812429B2Publication Date: 2017-11-07
- Inventor: Rabindra N. Das , Mark A. Gouker , Pascale Gouker , Leonard M. Johnson , Ryan C. Johnson
- Applicant: Massachusetts Institute of Technology
- Applicant Address: US MA Cambridge
- Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
- Current Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
- Current Assignee Address: US MA Cambridge
- Agency: Daly, Crowley, Mofford & Durkee, LLP
- International Application: PCT/US2015/059200 WO 20151105
- International Announcement: WO2016/118210 WO 20160728
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L25/065 ; H01L23/48

Abstract:
A multi-layer semiconductor device includes a first semiconductor structure having first and second opposing surfaces, the second surface of the first semiconductor structure having at least a first semiconductor package pitch. The multi-layer semiconductor device also includes a second semiconductor structure having first and second opposing surfaces, the first surface of the second semiconductor structure having a second semiconductor package pitch. The multi-layer semiconductor device additionally includes a third semiconductor structure having first and second opposing surfaces, the first surface of the third semiconductor structure having a third semiconductor package pitch which is different from at least the second semiconductor package pitch. The second and third semiconductor structures are provided on a same package level of the multi-layer semiconductor device. A corresponding method for fabricating a multi-layer semiconductor device is also provided.
Public/Granted literature
- US20170092621A1 Interconnect Structures for Assembly of Multi-Layer Semiconductor Devices Public/Granted day:2017-03-30
Information query
IPC分类: