Invention Grant
- Patent Title: Methods and apparatus to increase an integrity of mismatch corrections of an interleaved analog to digital converter
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Application No.: US15145375Application Date: 2016-05-03
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Publication No.: US09813072B2Publication Date: 2017-11-07
- Inventor: Sthanunathan Ramakrishnan , Sashidharan Venkatraman , Jaiganesh Balakrishnan
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Charles A. Brill; Frank D. Cimino
- Priority: IN2557/CHE/2015 20150522
- Main IPC: H03M1/06
- IPC: H03M1/06 ; H03M1/12 ; H03M1/10

Abstract:
Methods, apparatus, systems and articles of manufacture to increase an integrity of mismatch corrections in an interleaved analog to digital converter are disclosed. An example apparatus includes an instantaneous mismatch estimator that uses an output of an interleaved analog to digital converter to identify a mismatch estimate between two or more component analog to digital converters of the interleaved analog to digital converter. An integrity monitor is to cause the instantaneous mismatch estimator to avoid incorrectly providing the mismatch estimate to a filter, the integrity monitor to instruct the filter to remove the mismatch estimate when the mismatch estimate is detected to be inaccurate.
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