A wiring substrate includes a first insulation layer covering a first wiring layer, a wiring pattern formed on an upper surface of the first insulation layer, and a via formed in a via hole of the first insulation layer to electrically connect the wiring pattern and the first wiring layer. The via includes a via seed layer and a filled portion filling the via hole. The wiring pattern includes a wiring seed layer formed on the upper surface of the first insulation layer and a pattern layer formed on the wiring seed layer. The via seed layer is formed from a metal acting to adsorb a plating enhancement agent, which enhances formation of the filled portion and the pattern layer in an electrolytic plating solution. The wiring seed layer is formed from a metal not acting to adsorb the plating enhancement agent as compared to the via seed layer.