Invention Grant
- Patent Title: Method of forming inter-level dielectric structures on semiconductor devices
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Application No.: US14687360Application Date: 2015-04-15
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Publication No.: US09818642B2Publication Date: 2017-11-14
- Inventor: Douglas M. Reber , Mehul D. Shroff
- Applicant: FREESCALE SEMICONDUCTOR, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, INC.
- Current Assignee: NXP USA, INC.
- Current Assignee Address: US TX Austin
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/532 ; H01L23/522
Abstract:
A semiconductor device and a method for making the semiconductor device are provided. The method of making the semiconductor device may include patterning a layer for a first conductor and a second conductor, plating patterned portions of the layer to form the first conductor and the second conductor, removing patterned material to form an air gap between the first conductor and the second conductor, applying a self-supporting film on top of the first conductor and the second conductor to enclose the air gap, and reacting the self-supporting film causing the self-supporting film to be substantially non-conductive.
Public/Granted literature
- US20160307791A1 METHOD OF FORMING INTER-LEVEL DIELECTRIC STRUCTURES ON SEMICONDUCTOR DEVICES Public/Granted day:2016-10-20
Information query
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