Invention Grant
- Patent Title: Self-aligned interconnection structure and method
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Application No.: US14928916Application Date: 2015-10-30
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Publication No.: US09818690B2Publication Date: 2017-11-14
- Inventor: Jung-Hsun Tsai , Chi-Lin Teng , Kai-Fang Cheng , Hsin-Yen Huang , Hai-Ching Chen , Tien-I Bao , Chien-Hua Huang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/522 ; H01L21/02 ; H01L23/532 ; H01L23/528 ; H01L21/768 ; H01L21/311

Abstract:
The present disclosure provides a method that includes providing a substrate having a first dielectric material layer and first conductive features that are laterally separated from each other by segments of the first dielectric material layer; depositing a first etch stop layer on the first dielectric material layer and the first conductive features, thereby forming the first etch stop layer having oxygen-rich portions self-aligned with the segments of the first dielectric material layer and oxygen-poor portions self-aligned with the first conductive features; performing a selective removal process to selectively remove the oxygen-poor portions of the first etch stop layer; forming a second etch stop layer on the first conductive features and the oxygen-rich portions of the first etch stop layer; forming a second dielectric material layer on the second etch stop layer; and forming a conductive structure in the second dielectric material layer.
Public/Granted literature
- US20170125340A1 Self-Aligned Interconnection Structure and Method Public/Granted day:2017-05-04
Information query
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