Invention Grant
- Patent Title: Leakage current suppression methods and related structures
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Application No.: US14477491Application Date: 2014-09-04
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Publication No.: US09818744B2Publication Date: 2017-11-14
- Inventor: Aryan Afzalian
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/165 ; H01L29/10 ; H01L29/08 ; H01L29/205 ; H01L29/423 ; H01L29/78 ; H01L29/739 ; H01L29/06 ; H01L29/66

Abstract:
A method and structure for suppressing band-to-band tunneling current in a semiconductor device having a high-mobility channel material includes forming a channel region adjacent to and in contact with one of a source region and a drain region. A tunnel barrier layer may be formed such that the tunnel barrier layer is interposed between, and in contact with, the channel region and one of the source region and the drain region. In some embodiments, a gate stack is then formed over at least the channel region. In various examples, the tunnel barrier layer includes a first material, and the channel region includes a second material different than the first material. In some embodiments, the semiconductor device may be oriented in one of a horizontal or vertical direction, and the semiconductor device may include one of a single-gate or multi-gate device.
Public/Granted literature
- US20160071965A1 LEAKAGE CURRENT SUPPRESSION METHODS AND RELATED STRUCTURES Public/Granted day:2016-03-10
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