Invention Grant
- Patent Title: Methods of forming buried vertical capacitors and structures formed thereby
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Application No.: US15490754Application Date: 2017-04-18
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Publication No.: US09818751B2Publication Date: 2017-11-14
- Inventor: Rajashree Baskaran , Kimin Jun , Patrick Morrow
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe Williamson & Wyatt P.C.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L49/02
Abstract:
Methods of forming passive elements under a device layer are described. Those methods and structures may include forming at least one passive structure, such as a capacitor and a resistor structure, in a substrate, wherein the passive structures are vertically disposed within the substrate. An insulator layer is formed on a top surface of the passive structure, a device layer is formed on the insulator layer, and a contact is formed to couple a device disposed in the device layer to the at least one passive structure.
Public/Granted literature
- US20170221901A1 METHODS OF FORMING BURIED VERTICAL CAPACITORS AND STRUCTURES FORMED THEREBY Public/Granted day:2017-08-03
Information query
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