Invention Grant
- Patent Title: Path selection based on error analysis
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Application No.: US14643141Application Date: 2015-03-10
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Publication No.: US09819575B2Publication Date: 2017-11-14
- Inventor: Sudharsan Dhamal Gopalarathnam , Premnath Sundarababu , Mahesh Manivasagam
- Applicant: DELL PRODUCTS L.P.
- Applicant Address: US TX Round Rock
- Assignee: DELL PRODUCTS LP
- Current Assignee: DELL PRODUCTS LP
- Current Assignee Address: US TX Round Rock
- Agency: North Weber & Baugh LLP
- Main IPC: G06F15/16
- IPC: G06F15/16 ; H04L12/707 ; H04L12/26 ; G06F11/07 ; G06F11/08 ; H04L12/709 ; H04L12/753 ; G06F11/30

Abstract:
Embodiments of the present invention include systems and methods for optimizing data flow in a network. The system for distributing data flow in a network includes a controller that receives, from a set of nodes coupled through the network, information of errors at the ports of each node through an input-output (IO) port. The controller compiles the information of errors to assign credits to links coupled to the ports; determines, based on the credits, how to distribute data flow in the network; generates a control signal for controlling the ports; and sends the control signal to the set of nodes through the IO port. The set of nodes controls the ports according to the control signal.
Public/Granted literature
- US20160269278A1 PATH SELECTION BASED ON ERROR ANALYSIS Public/Granted day:2016-09-15
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