Invention Grant
- Patent Title: Semiconductor device and method of forming conductive pillar having an expanded base
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Application No.: US13468981Application Date: 2012-05-10
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Publication No.: US09824923B2Publication Date: 2017-11-21
- Inventor: Dzafir Shariff , Kwong Loon Yam , Lai Yee Chia , Yung Kuan Hsiao
- Applicant: Dzafir Shariff , Kwong Loon Yam , Lai Yee Chia , Yung Kuan Hsiao
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/768 ; H01L25/065 ; H01L23/00 ; H01L21/683

Abstract:
A semiconductor device has a first semiconductor die and conductive vias in the first semiconductor die. The conductive vias can be formed by extending the vias partially through a first surface of the first semiconductor die. A portion of a second surface of the first semiconductor die is removed to expose the conductive vias. A plurality of conductive pillars is formed over the first surface the first semiconductor die. The conductive pillars include an expanded base electrically connected to the conductive vias. A width of the expanded base of the conductive pillars is greater than a width of a body of the conductive pillars. A conductive layer is formed over a second surface of the first semiconductor die. The conductive layer is electrically connected to the conductive vias. A second semiconductor die is mounted to the first semiconductor die with a second conductive pillar having an expanded base.
Public/Granted literature
- US20130093100A1 Semiconductor Device and Method of Forming Conductive Pillar Having an Expanded Base Public/Granted day:2013-04-18
Information query
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