- Patent Title: Semiconductor memory device and method of manufacturing the same
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Application No.: US15271473Application Date: 2016-09-21
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Publication No.: US09825054B2Publication Date: 2017-11-21
- Inventor: Kotaro Fujii , Hideaki Aochi
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L29/792 ; H01L21/8238 ; H01L27/11582 ; H01L27/11565 ; H01L23/528

Abstract:
The memory string comprises: a first semiconductor layer; a stacked body in which a plurality of conductive layers and a plurality of interlayer insulating layers are stacked along a first direction above the first semiconductor layer; and a second semiconductor layer having a longitudinal direction along the first direction and provided above the first semiconductor layer. The memory insulating layer includes a charge accumulation layer between the second semiconductor layer and the plurality of the conductive layers. The core insulating layer has a longitudinal direction along the first direction, and is provided in the second semiconductor layer. The oxide film layer is provided between the core insulating layer and the second semiconductor layer.
Public/Granted literature
- US20170271365A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2017-09-21
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