Invention Grant
- Patent Title: Memory device having electrically insulated reset gate
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Application No.: US15140165Application Date: 2016-04-27
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Publication No.: US09825097B2Publication Date: 2017-11-21
- Inventor: Fujio Masuoka , Hiroki Nakamura
- Applicant: Unisantis Electronics Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Brinks Gilson & Lione
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00

Abstract:
A memory that includes a memory device having a phase change layer that can be reset by using a reset gate is provided. A memory device includes memory elements arranged in two or more rows and two or more columns. Each memory element includes a pillar-shaped phase change layer, a reset gate insulating film surrounding the pillar-shaped phase change layer, and a reset gate surrounding the reset gate insulating film. The reset gates are connected in a row direction and in a column direction, and are heaters. The pillar-shaped phase change layers are electrically insulated from the reset gates.
Public/Granted literature
- US20160240586A1 MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND METHODS FOR PRODUCING MEMORY DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2016-08-18
Information query
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