Invention Grant
- Patent Title: Semiconductor device comprising a transistor array and a termination region and method of manufacturing such a semiconductor device
-
Application No.: US15040624Application Date: 2016-02-10
-
Publication No.: US09825170B2Publication Date: 2017-11-21
- Inventor: Franz Hirler , Andreas Meiser , Till Schloesser
- Applicant: Franz Hirler , Andreas Meiser , Till Schloesser
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Baker Botts L.L.P.
- Priority: DE102015102115 20150213
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/78 ; H01L21/765 ; H01L21/8234 ; H01L27/088 ; H01L29/06 ; H01L29/66 ; H01L29/10 ; H01L29/40 ; H01L29/423 ; H01L21/265 ; H01L29/417

Abstract:
A semiconductor device formed in a semiconductor substrate having a first main surface comprises a transistor array and a termination region. The transistor array comprises a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region. The gate electrode is disposed in first trenches. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a first ridge extending along the first direction. The termination region comprises a termination trench, a portion of the termination trench extending in the first direction, a length of the termination trench being larger than a length of the first trenches, the length being measured along the first direction.
Public/Granted literature
Information query
IPC分类: