- Patent Title: Slot-shielded coplanar strip-line compatible with CMOS processes
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Application No.: US14802267Application Date: 2015-07-17
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Publication No.: US09831173B2Publication Date: 2017-11-28
- Inventor: Yu-Ling Lin , Hsiao-Tsung Yen , Ho-Hsiang Chen , Chin-Wei Kuo , Chewn-Pu Jou
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/14
- IPC: H01L23/14 ; H01L23/522 ; H01L23/64 ; H01L23/528 ; H01L23/66 ; H01L27/06

Abstract:
A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.
Public/Granted literature
- US20150325513A1 Slot-Shielded Coplanar Strip-line Compatible with CMOS Processes Public/Granted day:2015-11-12
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