A system and method where a comparator is operatively coupled to an output of a Digital-to-analog Converter (DAC). The DAC may comprise a single DAC core or a plurality of interleaved DAC cores. The comparator is configured to capture properties of DAC core output. A digital engine is operatively coupled to receive output of the comparator and configured to calculate a cross-correlation between comparator output and input to the DAC core(s). The digital engine may be configured to determine if the skew of each DAC core is positive or negative and to determine if a skew correction term for the DAC core(s) should be decreased or increased, based on the skew of each DAC core being positive or negative, respectively. In interleaved DAC core devices, clock frequency sampling edges of the comparator may alternate between clock edges of each of the interleaved DAC cores.