Invention Grant
- Patent Title: 3D semiconductor device with reduced chip size
-
Application No.: US14789505Application Date: 2015-07-01
-
Publication No.: US09837419B2Publication Date: 2017-12-05
- Inventor: Sung Lae Oh , Dae Sung Eom
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2015-0039064 20150320
- Main IPC: H01L27/08
- IPC: H01L27/08 ; H01L29/76 ; H01L21/70 ; H01L27/105 ; H01L27/11519 ; H01L27/11529 ; H01L27/11556 ; H01L27/11565 ; H01L27/11573 ; H01L27/11582

Abstract:
A semiconductor device includes a first memory block and a second memory block in a cell region and a first transistor and a second transistor, respectively corresponding to the first and second memory blocks, in a pass transistor region located below the cell region, wherein each of the first and second transistors includes: a first gate electrode coupled to the first memory block and a second gate electrode coupled to the second memory block.
Public/Granted literature
- US20160276261A1 SEMICONDUCTOR DEVICE Public/Granted day:2016-09-22
Information query
IPC分类: