Invention Grant
- Patent Title: Vertical P-type, N-type, P-type (PNP) junction integrated circuit (IC) structure
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Application No.: US15073763Application Date: 2016-03-18
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Publication No.: US09837514B2Publication Date: 2017-12-05
- Inventor: Joseph R. Greco , Qizhi Liu , Aaron L. Vallett , Robert F. Vatter
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Steven J. Meyers
- Main IPC: H01L29/73
- IPC: H01L29/73 ; H01L29/732 ; H01L29/66 ; H01L29/10 ; H01L21/768 ; H01L29/06 ; H01L29/08 ; H01L29/16 ; H01L29/423 ; H01L29/45 ; H01L27/082 ; H01L27/06 ; H01L29/417 ; H01L21/8249

Abstract:
Various particular embodiments include an integrated circuit (IC) structure having: a stack region; and a silicon substrate underlying and contacting the stack region, the silicon substrate including: a silicon region including a doped subcollector region; a set of isolation regions overlying the silicon region; a base region between the set of isolation regions and below the stack region, the base region including an intrinsic base contacting the stack region, an extrinsic base contacting the intrinsic base and the stack region, and an amorphized extrinsic base contact region contacting the extrinsic base; a collector region between the set of isolation regions; an undercut collector-base region between the set of isolation regions and below the base region; and a collector contact region contacting the collector region under the intrinsic base and the collector-base region via the doped subcollector region.
Public/Granted literature
- US20160197167A1 Vertical P-Type, N-Type, P-Type (PNP) Junction Integrated Circuit (IC) Structure Public/Granted day:2016-07-07
Information query
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