Semiconductor device and operating method thereof
Abstract:
A semiconductor memory device includes a plurality of memory cell blocks each including a plurality of word lines and suitable for being selectively activated based on an active command and a row address, wherein word lines are selected from the respective activated memory cell blocks based on the active command and the row address, and a column decoding block sequentially accessing the activated memory cell blocks to input/output data thereof by decoding a column address based on the row address.
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