In a semiconductor substrate, a memory cell region in which a flash memory cell is formed is defined by an element isolation region. A floating gate electrode of the flash memory cell includes a protruding portion protruding toward an erase gate electrode so as to flare from a portion located immediately below a control gate electrode. Protruding portion includes an end face of a height corresponding to a thickness, and an inclined surface continuous with end face. Protruding portion faces erase gate electrode with a tunnel oxide film interposed therebetween.