Invention Grant
- Patent Title: Apparatus for impurity layered epitaxy
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Application No.: US14444640Application Date: 2014-07-28
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Publication No.: US09856580B2Publication Date: 2018-01-02
- Inventor: Errol Antonio C. Sanchez , Swaminathan T. Srinivasan
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan LLP
- Main IPC: C30B25/08
- IPC: C30B25/08 ; C30B25/14 ; C30B25/12 ; C30B25/10 ; C30B29/06 ; C30B29/36 ; C30B29/52

Abstract:
Embodiments of the disclosure relate to an apparatus for processing a semiconductor substrate. The apparatus includes a process chamber having a substrate support for supporting a substrate, a lower dome and an upper dome opposing the lower dome, a plurality of gas injects disposed within a sidewall of the process chamber. The apparatus includes a gas delivery system coupled to the process chamber via the plurality of gas injects, the gas delivery system includes a gas conduit providing one or more chemical species to the plurality of gas injects via a first fluid line, a dopant source providing one or more dopants to the plurality of gas injects via a second fluid line, and a fast switching valve disposed between the second fluid line and the process chamber, wherein the fast switching valve switches flowing of the one or more dopants between the process chamber and an exhaust.
Public/Granted literature
- US20150047566A1 APPARATUS FOR IMPURITY LAYERED EPITAXY Public/Granted day:2015-02-19
Information query
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