Invention Grant
- Patent Title: Negative bias thermal instability stress testing of transistors
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Application No.: US14461327Application Date: 2014-08-15
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Publication No.: US09857409B2Publication Date: 2018-01-02
- Inventor: Jamil Kawa , Tzong-Kwang Henry Yeh , Shih-Yao Christine Sun , Raymond Tak-Hoi Leung
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: HIPLegal LLP
- Agent Judith Szepesi
- Main IPC: G01R31/26
- IPC: G01R31/26
Abstract:
A circuit is powered through a P-type transistor whose thermal instability behavior is to be evaluated. The threshold of the P-type transistor under evaluation and consequently the saturation current of the transistor are reflected in the frequency of the circuit, which in one embodiment is a ring oscillator. Additional circuitry is connected to the P-type transistor and the ring oscillator to ensure the proper stress conditions for the transistor and consequently to the evaluation of the P-type transistor.
Public/Granted literature
- US20150061726A1 NEGATIVE BIAS THERMAL INSTABILITY STRESS TESTING OF TRANSISTORS Public/Granted day:2015-03-05
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