A debugging circuit including: a storage configured to store a first code value which is calculated by an encoding method in which a value is changed according to a sequence of a signal in a debugging target circuit, and indicates a stop condition of the debugging target circuit; a code value calculator configured to calculate a second code value by the encoding method based on the signal each time when the signal is changed; and an operation stopper configured to stop an operation of the debugging target circuit when the first code value and the second code value are identical to each other.