A display panel includes: a pixel electrode including first, second, and third sub-pixel electrodes separated from each other; a first TFT connected to the first sub-pixel electrode; second and fourth TFTs connected to the second sub-pixel electrode; a third TFT connected to the third sub-pixel electrode; a first gate line connected to the first to third TFTs; a second gate line connected to the fourth TFT; a data line electrically insulated from and intersecting the first and second gate lines and connected to the first to third TFTs; and a storage electrode connected to the fourth TFT and overlapping the first sub-pixel electrode.