Invention Grant
- Patent Title: Bank-level fault management in a memory system
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Application No.: US14506783Application Date: 2014-10-06
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Publication No.: US09857993B2Publication Date: 2018-01-02
- Inventor: Timothy J. Dell , Girisankar Paulraj , Diyanesh B.Chinnakkonda Vidyapoornachary
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F3/06 ; G06F11/07 ; G06F11/20 ; G06F11/10 ; G06F11/16

Abstract:
According to one aspect, bank-level fault management in a memory system is provided. The memory system includes a plurality of ranks, each rank including a plurality of memory devices each having a plurality of banks. A first error is detected in a first bank number of a first memory device of a rank. The first bank number of the first memory device is marked with a bank-level chip mark. The bank-level chip mark isolates declaration of an error condition to the first bank number. A bank-level fault management action is performed based on the bank-level chip mark to accommodate the error condition.
Public/Granted literature
- US20150363287A1 BANK-LEVEL FAULT MANAGEMENT IN A MEMORY SYSTEM Public/Granted day:2015-12-17
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