Invention Grant
- Patent Title: Selective error coding
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Application No.: US14835790Application Date: 2015-08-26
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Publication No.: US09858145B2Publication Date: 2018-01-02
- Inventor: Diyanesh Babu Chinnakkonda Vidyapoornachary , Timothy J. Dell , Marc A. Gollub , Anil B. Lingambudi
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Robert Williams
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52 ; G06F3/06 ; G11C29/42 ; G11C29/44 ; G11C11/401

Abstract:
A system and method of performing selective error coding in memory management of a memory device are described. The method includes performing a process of detecting and correcting memory errors in the memory of the memory device either prior to or after a chip mark associated with the memory device is in place. The method also includes localizing hard errors of the memory device based on a second process of detecting the memory errors in the memory of the memory device, the hard errors being persistent memory errors that persist from the process of detecting and correcting the memory errors to the second process, determining an extent of the hard errors based on the localizing, and preventing placement of the chip mark or removing the chip mark after de-allocating one or more ranges of addresses based on a result of the determining the extent of the hard errors.
Public/Granted literature
- US20160357629A1 SELECTIVE ERROR CODING Public/Granted day:2016-12-08
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