Invention Grant
- Patent Title: Computing architecture with concurrent programmable data co-processor
-
Application No.: US14660589Application Date: 2015-03-17
-
Publication No.: US09858220B2Publication Date: 2018-01-02
- Inventor: Eugenio Culurciello , Berin Eduard Martini , Vinayak Anand Gokhale , Jonghoon Jin , Aysegul Dundar
- Applicant: Purdue Research Foundation
- Applicant Address: US IN West Lafayette
- Assignee: Purdue Research Foundation
- Current Assignee: Purdue Research Foundation
- Current Assignee Address: US IN West Lafayette
- Agency: Purdue Research Foundation
- Main IPC: G06F13/20
- IPC: G06F13/20 ; G06F13/28 ; G06F12/02 ; G06F9/44 ; G06F9/46 ; G06N3/063

Abstract:
A coprocessor (PL) is disclosed. The PL includes a memory router, at least one collection block that is configured to transfer data to/from the memory router, each collection block includes a collection router that is configured to i) transfer data to/from the memory router, ii) transfer data to/from at least one collection router of a neighboring collection block, and iii) transfer data to/from blocks within the collection block, and at least one programmable operator that is configured to i) transfer data to/from the collection router, and ii) perform a programmable operation on data received from the collection router.
Public/Granted literature
- US20150261702A1 COMPUTING ARCHITECTURE WITH CONCURRENT PROGRAMMABLE DATA CO-PROCESSOR Public/Granted day:2015-09-17
Information query