Dynamic assignment of groups of resources in a peripheral component interconnect express network
Abstract:
Systems and methods for analyzing a PCIe network using a graph-theory based analysis are disclosed. A management CPU is coupled to the root complex of the PCIe system and is operable to survey potential CPU-resource combinations in a PCIe system and assign a group of PCIe resources to a CPU. A first switch and a second switch are coupled to the root node, and a first CPU and a first group of PCIe resources are coupled to the first switch. The management CPU assigns a group of PCIe resources to a CPU based on the isolation of the first and second CPUs or a distance between the first and second CPUs and the groups of PCIe resources. According to some embodiments, for potential pairs of devices and NTB/CPUs, the distance between components is assessed, possible alternative paths are identified, and the isolation of the pair is determined.
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