Invention Grant
- Patent Title: Method of analog front end optimization in presence of circuit nonlinearity
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Application No.: US14928952Application Date: 2015-10-30
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Publication No.: US09858381B2Publication Date: 2018-01-02
- Inventor: Gaurav Malhotra
- Applicant: SAMSUNG DISPLAY CO., LTD.
- Applicant Address: KR Yongin-si
- Assignee: Samsung Display Co., Ltd.
- Current Assignee: Samsung Display Co., Ltd.
- Current Assignee Address: KR Yongin-si
- Agency: Lewis Roca Rothgerber Christie LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method for manufacturing a serial link including a channel and a receiver, the link including linear time-invariant elements, the receiver including a continuous-time linear equalizer (CTLE) including a nonlinear block, and a slicer having an input. The method includes: for each of a plurality of candidate CTLE configurations: calculating a first probability density function (PDF), corresponding to a first signal value, at the input of the nonlinear block, calculating a first PDF, corresponding to the first signal value, at the output of the nonlinear block; calculating a second PDF, corresponding to a second signal value, at the input of the nonlinear block, calculating a second PDF, corresponding to the second signal value, at the output of the nonlinear block; and calculating a bit error rate.
Public/Granted literature
- US20160154923A1 METHOD OF ANALOG FRONT END OPTIMIZATION IN PRESENCE OF CIRCUIT NONLINEARITY Public/Granted day:2016-06-02
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