Invention Grant
- Patent Title: Reduced precision ray traversal with plane reuse
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Application No.: US15182694Application Date: 2016-06-15
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Publication No.: US09858704B2Publication Date: 2018-01-02
- Inventor: Karthik Vaidyanathan , Marco Salvi
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop Pruner & Hu, P.C.
- Main IPC: G06T15/06
- IPC: G06T15/06
Abstract:
A computation for a parent node may be reused in a child node in a reduced precision bounding volume hierarchy ray traversal for graphics processing.
Public/Granted literature
- US20170287203A1 Reduced Precision Ray Traversal with Plane Reuse Public/Granted day:2017-10-05
Information query
IPC分类:
| G | 物理 |
| G06 | 计算；推算或计数 |
| G06T | 一般的图像数据处理或产生 |
| G06T15/00 | 3D〔三维〕图像的加工 |
| G06T15/06 | .光线跟踪 |
