Invention Grant
- Patent Title: Integrated circuit with low power SRAM
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Application No.: US12848294Application Date: 2010-08-02
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Publication No.: US09858986B2Publication Date: 2018-01-02
- Inventor: Theodore W. Houston , Srinivasa Raghavan Sridhara
- Applicant: Theodore W. Houston , Srinivasa Raghavan Sridhara
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Charles A. Brill; Frank D. Cimino
- Main IPC: G11C11/413
- IPC: G11C11/413
Abstract:
An integrated circuit containing a SRAM memory with SRAM bits optimized to have a lower minimum read voltage than the minimum write voltage. A method for reading a SRAM memory bit using a read voltage that is lower than the write voltage.
Public/Granted literature
- US20120026808A1 Integrated Circuit With Low Power SRAM Public/Granted day:2012-02-02
Information query
IPC分类:
