Invention Grant
- Patent Title: Nonvolatile semiconductor memory device including pillars buried inside through holes
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Application No.: US15190921Application Date: 2016-06-23
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Publication No.: US09859211B2Publication Date: 2018-01-02
- Inventor: Takashi Maeda , Yoshihisa Iwata
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-080526 20080326
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L27/11551 ; H01L27/11556 ; H01L27/11578 ; H01L23/522 ; H01L27/1157 ; H01L27/11582

Abstract:
In a nonvolatile semiconductor memory device, a stacked body is formed by alternately stacking dielectric films and conductive films on a silicon substrate and a plurality of through holes extending in the stacking direction are formed in a matrix configuration. A shunt interconnect and a bit interconnect are provided above the stacked body. Conductor pillars are buried inside the through holes arranged in a line immediately below the shunt interconnect out of the plurality of through holes, and semiconductor pillars are buried inside the remaining through holes. The conductive pillars are formed from a metal, or low resistance silicon. Its upper end portion is connected to the shunt interconnect and its lower end portion is connected to a cell source formed in an upper layer portion of the silicon substrate.
Public/Granted literature
- US20160307838A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING PILLARS BURIED INSIDE THROUGH HOLES SAME Public/Granted day:2016-10-20
Information query
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