- Patent Title: Method of forming 3D integrated circuit package with panel type lid
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Application No.: US15358082Application Date: 2016-11-21
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Publication No.: US09859266B2Publication Date: 2018-01-02
- Inventor: Tsung-Ding Wang , Kim Hong Chen , Jung Wei Cheng , Chien Ling Hwang , Hsin-Yu Pan , Han-Ping Pu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L23/31 ; H01L25/065 ; H01L23/42 ; H01L23/00 ; H01L21/78 ; H01L23/367 ; H01L23/04 ; H01L23/10 ; H01L23/498
Abstract:
Presented herein is a package comprising a carrier device of a device stack and at least one top device of the device stack mounted on a first side of the carrier device. A lid is mounted on the first side of the carrier device, with a first portion of the lid attached to the carrier device and a second portion of the lid extending past and overhanging a respective edge of the carrier device. The lid comprises a recess disposed in a first side, and the at least one top device is disposed within the recess. A thermal interface material disposed on the top device and contacts a surface of the recess.
Public/Granted literature
- US20170077078A1 Method Of Forming 3D Integrated Circuit Package With Panel Type Lid Public/Granted day:2017-03-16
Information query
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