Invention Grant
- Patent Title: Cache coherent system including master-side filter and data processing system including same
-
Application No.: US15198583Application Date: 2016-06-30
-
Publication No.: US09864687B2Publication Date: 2018-01-09
- Inventor: Sik Kim , Woo Hyung Chun , Seong Min Jo , Jae Young Hur
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2016-0021651 20160224
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0831 ; G06F12/14 ; G06F13/00 ; G06F13/28

Abstract:
An application processor is provided. The application processor includes a cache coherent interconnect, a first master device connected to the cache coherent interconnect, a second master device, and a master-side filter connected between the cache coherent interconnect and the second master device. The master-side filter receives a snoop request from the first master device through the cache coherent interconnect, compares a second security attribute of the second master device with a first security attribute of the first master device which is included in the snoop request, and determines whether to transmit an address included in the snoop request to the second master device according to a comparison result.
Public/Granted literature
- US20170004084A1 CACHE COHERENT SYSTEM INCLUDING MASTER-SIDE FILTER AND DATA PROCESSING SYSTEM INCLUDING SAME Public/Granted day:2017-01-05
Information query