Invention Grant
- Patent Title: Multilayer printed board and layout method for multilayer printed board
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Application No.: US14644622Application Date: 2015-03-11
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Publication No.: US09864826B2Publication Date: 2018-01-09
- Inventor: Satoru Fukuchi
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H05K1/11 ; H05K1/02 ; H05K3/00

Abstract:
According to one embodiment, a multilayer printed board includes an insulating substrate, a differential signal wiring, and anti-pad regions. Distances between peripheries of the pad and a constant potential layer in each of the wiring layers are set so that a capacitance between the constant potential layers and a signal via included in a signal line constituting the differential signal wiring, which has a longer route from a transmission end to a reception end, is smaller than a capacitance between the constant potential layers and another signal via included in the other signal line.
Public/Granted literature
- US20160128191A1 MULTILAYER PRINTED BOARD AND LAYOUT METHOD FOR MULTILAYER PRINTED BOARD Public/Granted day:2016-05-05
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