Invention Grant
- Patent Title: Method of manufacturing capacitor including intermediate dielectric layer with first internal electrodes and second internal electrodes
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Application No.: US14932258Application Date: 2015-11-04
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Publication No.: US09865396B2Publication Date: 2018-01-09
- Inventor: Tomokazu Nakashima , Masayuki Itoh
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2014-011167 20140124
- Main IPC: H01G9/00
- IPC: H01G9/00 ; H01G4/30 ; H01G4/12 ; H01G4/008 ; H01G4/018 ; H01G4/38 ; H01G4/012 ; H01G4/232

Abstract:
A capacitor includes: dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; first interlayer electrode and second interlayer electrode arranged alternately with each other between at least two layers among the dielectric layers; a first external electrode disposed on lateral surfaces of the dielectric layers and coupled to the first interlayer electrode; and a second external electrode disposed on lateral surfaces of the dielectric layers and coupled to the second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the first internal electrodes.
Public/Granted literature
- US20160055977A1 CAPACITOR AND METHOD OF MANUFACTURING CAPACITOR Public/Granted day:2016-02-25
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