Invention Grant
- Patent Title: High-voltage transistor architectures, processes of forming same, and systems containing same
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Application No.: US14673163Application Date: 2015-03-30
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Publication No.: US09865695B2Publication Date: 2018-01-09
- Inventor: Walid M. Hafez , Chia-Hong Jan , Anisur Rahman
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L29/45
- IPC: H01L29/45 ; H01L21/8234 ; H01L27/088 ; H01L29/66 ; H01L29/78 ; H01L27/092 ; H01L29/08 ; H01L29/49
Abstract:
An apparatus includes a first device with a metal gate and a drain well that experiences a series resistance that drops a drain contact voltage from 10 V to 4-6 V at a junction between the drain well and a channel under the gate. The apparatus includes an interlayer dielectric layer (ILD0) disposed above and on the drain well and a salicide drain contact in the drain well. The apparatus also includes a subsequent device that is located in a region different from the first device that operates at a voltage lower than the first device.
Public/Granted literature
- US20150206948A1 High-Voltage Transistor Architectures, Processes of Forming Same, and Systems Containing Same Public/Granted day:2015-07-23
Information query
IPC分类:
